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Patent Searching and Data


Title:
DIGITAL PHASE SYNCHRONIZING CIRCUIT
Document Type and Number:
Japanese Patent JPS58205337
Kind Code:
A
Abstract:

PURPOSE: To suppress the deterioration in the phase difference detecting capability of a phase comparator due to the change in the input frequency and to stabilize the titled circuit, by changing the input pulse width applied to the phase comparator in following to the change in the phase comparing period.

CONSTITUTION: A signal S1 of an intermittent inputted pulse train and a VCO controlling voltage S5 are inputted to a voltage controlled one-shot multivibrator 1, and the pulse width of an output signal S2 is arranged to a half the phase comparing period of the phase comparator 2 proportional to a VCO oscillating pulse frequency. The output signal S2 and a VCO oscillating pulse signal S6 are inputted to the phase comparator 2, the phase difference is detected, and a led phase difference signal S3 or a lagged phase difference signal S4 is outputted, synthesized at a filter 3, the VCO control voltage S5 is outputted and the VCO oscillating pulse signal S6 is obtained from a voltage controlled oscillator 4. Thus, the depretiation of the phase difference detecting ability due to the input frequency fluctuation is prevented.


Inventors:
MACHIDA TAKASHI
Application Number:
JP8823982A
Publication Date:
November 30, 1983
Filing Date:
May 25, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03L7/14; H03L7/08; (IPC1-7): H03L7/08
Attorney, Agent or Firm:
Uchihara Shin