PURPOSE: To attain high speed processing of syndrome calculation with simple constitution by attaining the operation of an existing clock supplied from a line by the parallel processing of a data part cf a BCH error correction code and a parity data part.

CONSTITUTION: Bits of a data part and a parity part constituting a BCH error correction code are inputted in parallel. Then an arithmetic means 101 holds sequentially each bit of the data part and the residual is calculated by a prescribed division processing, each bit of the parity data part is held at a point of time of residual calculation, a storage means 103 stores each bit of the parity data part at the point of time of calculating the residual, an exclusive OR means 105 obtains exclusive OR between each bit of the residual and each bit of the parity data part and a syndrome. Thus, the operation supplied from the line by using the existing clock is attained. Then the syndrome of the BCH error correction code is calculated at a high speed with simple constitution.