PURPOSE: To shorten inspection time required for an electric test by performing a multiple inspection to plural memory packages.

CONSTITUTION: In respective memory packages 1-1WN, the same writing data 103 is written in parallel to predetermined respective addresses through a control signal 101. This writing data is read in parallel from the memory packages 1-1WN through the control signal 101 in the next reading operation step in accordance with an inspection pattern, and respectively, as reading data 104-1WN, they are fed to the corresponding AND circuit 2 and OR circuit 3. The writing and the reading of the data corresponding to the memory packages 1-1WN are successively performed every address corresponding to the respective of the packages 1-1WN, according to the inspection pattern.