Title:
電子デバイス、試験装置、及び試験方法
Document Type and Number:
Japanese Patent JP5133870
Kind Code:
B2
Abstract:
A testing apparatus tests the performance of an electronic device having an operation circuit for providing a useful output signal. A demodulator configured to provide a phase or frequency demodulated signal related to the output of the operation circuit is packaged with the operation circuit. The gain of the demodulator is controllable from outside the package. The testing apparatus analyses the demodulated signal and controls the gain of the demodulator.
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Inventors:
Kiyotaka Ichiyama
Masahiro Ishida
Takahiro Yamaguchi
Masahiro Ishida
Takahiro Yamaguchi
Application Number:
JP2008505079A
Publication Date:
January 30, 2013
Filing Date:
March 07, 2007
Export Citation:
Assignee:
Advantest Corporation
International Classes:
G01R31/28; H01L21/822; H01L27/04
Domestic Patent References:
| JP2004226191A | 2004-08-12 | |||
| JPH0964278A | 1997-03-07 | |||
| JP2004251854A | 2004-09-09 | |||
| JPH06342042A | 1994-12-13 | |||
| JPH0587890A | 1993-04-06 | |||
| JP2004226191A | 2004-08-12 | |||
| JPH0964278A | 1997-03-07 | |||
| JP2004251854A | 2004-09-09 |
Attorney, Agent or Firm:
Longhua International Patent Service Corporation
Previous Patent: JPS5133869
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