Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
EPITAXIAL GROWTH METHOD OF COMPOUND SEMICONDUCTOR AND INP SUBSTRATE FOR IT
Document Type and Number:
Japanese Patent JP3129112
Kind Code:
B2
Abstract:

PURPOSE: To restrain a hillock from being generated by a method wherein, when a compound-semiconductor thin film is to be epitaxially grown on an InP substrate, a substrate in which the defect density of the InP substrate and an angle of inclination from a criterion plane (100) satisfy a specific expression is used.
CONSTITUTION: When a compound-semiconductor thin film is to be epitaxially grown on an InP substrate, a substrate in which the defect density D of the InP substrate and an angle of inclination from a criterion plane (100) satisfy Θ≥1.26×10-3D1/2 is used. At this time, D is expressed by a defect density EPD (cm-2), and Θ is expressed by an angle (°). However, the defect density of the substrate is a mean value. Since a defect (a dislocation) is irregular on the face of the substrate, it may be meaningless even when it is expressed by a high significant figure. When a significant figure is small, a first one digit for a proportionality constant is taken, and the angle of inclination is given by Θ≥1.26×10-3D1/2. Thereby, it is possible to restrain a hillock from being generated.


Inventors:
Kazuhiko Oida
Ryuji Nakai
Application Number:
JP24068094A
Publication Date:
January 29, 2001
Filing Date:
September 08, 1994
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
Sumitomo Electric Industries, Ltd.
International Classes:
C30B23/02; C30B25/02; C30B29/40; C30B25/18; H01L21/205; (IPC1-7): H01L21/205; C30B25/18; C30B29/40
Domestic Patent References:
JP2239188A
JP60260500A
JP7193007A
JP2244771A
JP6227898A
JP6453409A
JP5301795A
JP196982A
JP697072A
JP684796A
JP6415914A
JP61116823A
Attorney, Agent or Firm:
Shigeki Kawase



 
Previous Patent: JPH03129111

Next Patent: SEMICONDUCTOR CURRENT CONTROLLER