Title:
EQUALIZER AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2014143672
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To improve equalization characteristics with simpler constitution.SOLUTION: An equalizer includes: a first identification circuit which receives an input signal corresponding to a signal output from a transmission-side equalizer, and binarizes the input signal at intervals of a unit time with a first threshold; a second identification circuit which binarizes the input signal at the intervals of the unit time with a second threshold; a first delay circuit comprising N (N: an integer equal to or larger than 2) cascaded stages of unit delay circuits which receive an output signal of the first identification circuit and operates at the intervals of the unit time; a second delay circuit comprising N+1 or more cascaded stages of unit delay circuits which receive an output signal of the second identification circuit and operates at the intervals of the unit time; and a control part which receives a first output signal as an output of the first delay circuit and a second output signal as an output of the second identification circuit, and performs control not to increase a coefficient of the most temporally precedent precursor of the transmission-side equalizer when the first and second output signals are different in polarity.
Inventors:
TAN KENZO
TAKEUCHI MASAHIRO
TAKEUCHI MASAHIRO
Application Number:
JP2013214514A
Publication Date:
August 07, 2014
Filing Date:
October 15, 2013
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H04B3/04; H03H21/00; H04L25/03
Attorney, Agent or Firm:
Kato Asamichi
Previous Patent: JP2014143671
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