Title:
EXTERNAL SYNCHRONIZATION METHOD AND CIRCUIT
Document Type and Number:
Japanese Patent JP3710577
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an external synchronizing circuit which has automatic synchronization despite the variance of an external trigger signal by measuring the position of duty 50% by the 1st and 2nd duty decision circuits of an internal circuit for the internal trigger signal that is synchronous with the external trigger signal before the next external trigger signal arrives.
SOLUTION: An external synchronizing circuit receives the timing signals from the timing signal generation circuits 1 and 2 and measures the phase position against an external trigger signal EXT-TRIG in a single cycle T of an input clock EXT-CK. Then a reference internal trigger signal INT-TRIG is produced at the phase position that is corresponding to the arriving position of the signal EXT-TRIG in every following cycle T. An internal trigger production circuit 10 alternately distributes the signals INT-TRIG to the adjacent sections A and B which are divided at each arrival of the external trigger signal and then outputs the internal trigger signals TRIG-A and TRIG-B. The signals are received from the circuits 2 and 10 for decision of the position of duty 50% of a clock signal.
Inventors:
Yokomizo Akira
Application Number:
JP30347596A
Publication Date:
October 26, 2005
Filing Date:
October 30, 1996
Export Citation:
Assignee:
Akira Morimoto
International Classes:
H03K5/04; H03K5/00; H03K5/08; (IPC1-7): H03K5/04; H03K5/00; H03K5/08
Domestic Patent References:
| JP5226991A | ||||
| JP661809A | ||||
| JP5283990A | ||||
| JP5113467A | ||||
| JP222567A |
Foreign References:
| WO1990000329A1 |
Attorney, Agent or Firm:
Kiuchi Mitsuharu
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