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Title:
FABRICATION OF SOI SUBSTRATE
Document Type and Number:
Japanese Patent JPH08115975
Kind Code:
A
Abstract:

PURPOSE: To provide an SOI substrate where the thickness of silicon layer is 0.1μm or less and the fluctuation is ±5% or less by forming a p+ high concentration region and an abrasion stopper on the surface of an element side silicon substrate, sticking the element side silicon substrate to a supporting side substrate, performing a selective etching and abrading the substrate until the abrasion stopper is reached.

CONSTITUTION: p type impurities are introduced to the surface of an element side silicon substrate 5 to form a p+ type high concentration region 3 and then an abrasion stopper 2 of silicon oxide thinner than the p+ type high concentration region 3 is formed in an isolation region on the surface of the element side silicon substrate 5. The element side silicon substrate 5 is then stuck, on the surface side, to a support side silicon substrate 1 through a silicon oxide 4. Subsequently, the element side silicon substrate 5 is subjected to selective etching to leave the p+ type high concentration region 3 which is then abraded until the abrasion stopper 2 is reached. A mixture liquid of ethylene diamine and pyrocatechol is employed in the selective etching, for example.


Inventors:
ARIMOTO YOSHIHIRO
HORIE HIROSHI
SUGIMOTO FUMITOSHI
Application Number:
JP24936794A
Publication Date:
May 07, 1996
Filing Date:
October 14, 1994
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/762; H01L21/02; H01L21/304; H01L21/76; H01L27/12; (IPC1-7): H01L21/762; H01L21/02; H01L21/304; H01L27/12
Attorney, Agent or Firm:
Teiichi