PURPOSE: To ensure a high-speed redundancy suppressing process by installing the changing point detector to deect the changing point of the picture signal, the address signal generator and a small-size and low-cost computer each.
CONSTITUTION: Optical signal 110 is converted via video signal generator 300 into the analog signal and the writing clock which indicates the main scanning direction. The analog signal undergoes the binary coding through binary coding device 400 to generate the writing clock synchronized with the picture signal as well as the picture signal to then store these signals in buffer memory 500. The stored picture signal is controlled by changing point detector 600 and then read out by the reading clock, and the address signal of the main scanning direction via address signal generator 700. Small-size computer 800 makes generator 300 start the main scanning and then decides the end of the main scanning of one line to control memory 500. And the switching is given between writing and reading, and a commond is given to detector 600 to receive the detection signal as well as receive the address signal from generator 700. At the same time, a command is given to motor driving unit 900 to perform the secondary scanning, and then the picture signal, the detection signal and the address signal are received to carry out the redundancy suppressing process.
JPS5036929A | 1975-04-07 | |||
JPS5376704A | 1978-07-07 |