FADING FREQUENCY ESTIMATING CIRCUIT AND CDMA RECEIVER USING THE SAME

Japanese Patent JP3876403

B2

PROBLEM TO BE SOLVED: To calculate a frequency estimation value which will not be affected by S/N(signal-to-noise ratio) for a fading frequency estimating circuit and a CDMA receiver provided with such a circuit.
SOLUTION: This CDMA receiver is provided with a fading frequency estimation circuit, which consists of a delay detecting part which gets input a pilot signal by an inverse diffusion demodulation from fingers 4-1 through 4-n, whose timing is controlled by a searching part 9, and obtains output a slot time correlation value by extracting the real number of pairs of delay detecting output with slot time as units, a fading frequency judging part (a fading frequency estimating part 10) which calculates a fading frequency estimation value with the slot time correlation value, corresponding to a delay detection output by the minimum slot delay as the denominator and the other slot time correlation value as the numerator, and the CDMA receiver is constructed so as to get input a fading frequency estimation value into a search part 9, and a weighting factor controller 11 and into an SIR estimating part 12 and control as weighting synthesizing.

Kimura Dai
Noriyuki Kawaguchi
Morihiko Minowa

JP2000179609A

January 31, 2007

June 15, 2000

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富士通株式会社

H04B7/005; H04L27/01; H04B1/712; H04B7/02; H04B7/26; H04J13/00; H04W24/00; H04W28/18; (IPC1-7): H04B7/005; H04B7/02; H04B7/26; H04J13/00; H04L27/01

JP8265184A
JP2001519621A
JP9247059A
JP10051355A

WO2000060761A1
WO1999018702A2

石月ほか,SS無線通信における最大ドップラー周波数観測方式の検討,電子情報通信学会総合大会,日本,(社)電子情報通信学会,1998年 3月27日,B-5-111,p475
安藤ほか,パイロットシンボルを用いるドップラ周波数検出,電子情報通信学会総合大会,日本,(社)電子情報通信学会,2000年 3月28日,B-5-59,p444

Manabe Kiyoshi
Shoji Kashiwaya
Koichi Watanabe
Toshiro Ito

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