To restrain variances in terminal voltages between respective cells if a failure detection signal of the cell is outputted.

When the cell is in an normal condition, the base voltage of a transistor Q11 is set lower than its emitter voltage, and a transistor Q1 is set higher than its emitter voltage. When a signal (L level) indicating failure in the cell is outputted from a battery protection IC 11, the transistor Q1 turned on and the transistor Q11 is turned off. As a result, when a signal indicating failure in the cell is outputted, the voltages of all the cells s1 to s12 are used, thus preventing generation of a voltage difference between the respective cells.