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Patent Searching and Data


Title:
FAULT BRACKETING SYSTEM IN DUPLEX DEVICE
Document Type and Number:
Japanese Patent JPS5927356
Kind Code:
A
Abstract:

PURPOSE: To execute easily fault bracketing by a program control utilizing a control bus of a control device itself, by constituting so that a control device which becomes a holding state when a fault is generated can execute access directly to a fault controlled device.

CONSTITUTION: When a fault detecting part 312 detects a fault, a control device 1 and a control device 2 are set to a holding state and an operating state, respectively, by device switching control parts 12, 22. Also, only a control bus switching part except a control bus switching part 311 executes a switching operation so that a control bus 35 from a bus connecting part 24 is connected to a device to be controlled 33. In this way, only a device to be controlled 31 is connected to a control bus 34 of the device 1 which becomes a holding state, and others are connected to the bus 35 of the device 2 which is in operating state, and they are subjected to each control. A control part 21 executes a control program of a usual operation time, but a control part 11 executes a control program for bracketing a faulty part.


Inventors:
KOJIMA SUSUMU
Application Number:
JP13651582A
Publication Date:
February 13, 1984
Filing Date:
August 04, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04L1/22; G06F11/20; (IPC1-7): G06F11/20
Attorney, Agent or Firm:
Yutaro Kumagai