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Title:
FLICKER SUPPRESSION DEVICE
Document Type and Number:
Japanese Patent JPH08331516
Kind Code:
A
Abstract:

PURPOSE: To effectively suppress occurrence of flicker by minimizing the deterioration in vertical resolution in a video signal conversion circuit converting a video signal of the noninterlace system into an interlace system video signal.

CONSTITUTION: This device is provided with a level difference discrimination circuit that discriminates whether or not an absolute value of a level difference between picture elements in the horizontal direction is within a threshold level αand an absolute value of a level difference between lines is within a threshold level β in a rectangular area including processing object picture elements and a vertical direction low pass filter 9 whose characteristic is selected based on the result of discrimination of the level difference discrimination 20. The level difference discrimination circuit 20 is provided with a line memory 1, a 1-clock delay element 2, a mean value calculation circuit 3, a threshold level discrimination circuit 4 discriminating whether or not an absolute value of a level difference between input signals is within a threshold level α or over, a threshold level discrimination circuit 5 discriminating whether or not an absolute value of mean values is within a threshold level β or over, an OR gate 6, and AND circuits 7, 8.


Inventors:
KITAMURA HIDEO
YOSHIDA SHIGEO
Application Number:
JP13377595A
Publication Date:
December 13, 1996
Filing Date:
May 31, 1995
Export Citation:
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Assignee:
SHARP KK
International Classes:
H04N7/01; (IPC1-7): H04N7/01
Attorney, Agent or Firm:
Yoshio Kawaguchi (1 person outside)



 
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