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Patent Searching and Data


Title:
FLIP-FLOP CIRCUIT
Document Type and Number:
Japanese Patent JPS6089120
Kind Code:
A
Abstract:

PURPOSE: To obtain a master slave FF having scan-in/scan-out function with excellent AC characteristic by forming the circuit with three latch circuits.

CONSTITUTION: A latch circuit L1 latches a data input D with a clock C and a scan-in input with a clock A. Then a latch circuit L2 latches an output of the latch circuit L1 by using a clock C or C'. Moreover, a latch circuit L3 latches an output of the latch circuit L1 by using a clock B and its output is used as a scan-out output SO. The latch circuit L1 acts like a master section and the latch circuit L2 functions as a slave section at the system operation, and the latch circuit L1 acts like the master section and the latch circuit L3 functions as the slave function at the scan operation. Thus, the master slave FF circuit of master slave type having the scan-in/scan-out function with excellent AC characteristic is obtained.


Inventors:
TAKAGI HARUO
Application Number:
JP19745683A
Publication Date:
May 20, 1985
Filing Date:
October 21, 1983
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
G01R31/28; H03K3/037; (IPC1-7): H03K3/037
Attorney, Agent or Firm:
Takahisa Kimura