Title:
FOREIGN MATTER REMOVING METHOD FOR SEMICONDUCTOR DEVICE MANUFACTURING JIG AND INSPECTING METHOD FOR SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3493089
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To simply remove foreign matters stuck to a semiconductor manufacturing jig.
SOLUTION: Foreign matters stuck to a semiconductor device manufacturing jig assembling a resin package sealing a semiconductor chip and a semiconductor device having multiple outer lead sections are removed by this method. A foreign matter removing sheet 20 having stickiness is prepared, the foreign matter removing sheet 20 is pinched between a jig main body 11 having a connector section 18 to be kept in contact with the semiconductor device and a cover member 13 openable/closable to the jig main body 11, and foreign matters 10 stuck to the jig main body 11 adhere to the foreign matter removing sheet 20.
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Inventors:
Kiyoshi Tsuchida
Application Number:
JP33630395A
Publication Date:
February 03, 2004
Filing Date:
December 25, 1995
Export Citation:
Assignee:
Renesas Technology Corp.
Renesas Northern Japan Semiconductor Co., Ltd.
Renesas Northern Japan Semiconductor Co., Ltd.
International Classes:
G01R31/26; H01L21/60; H01L21/67; H01L21/68; (IPC1-7): G01R31/26; H01L21/60; H01L21/68
Domestic Patent References:
| JP2298422A | ||||
| JP7128368A |
Attorney, Agent or Firm:
Yamato Tsutsui
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