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Patent Searching and Data


Title:
FORMATION PANEL OF THIN-FILM TRANSISTOR
Document Type and Number:
Japanese Patent JPH056845
Kind Code:
A
Abstract:

PURPOSE: To prevent an interlayer short circuit from being caused at a thin-film transistor and an interconnection part and to enhance the production yield of the title panel by a method wherein a blocking layer composed of an oxide metal film which has anodized a metal film over its whole thickness is formed on a channel region in an i-type semiconductor layer.

CONSTITUTION: A blocking layer composed of an oxide metal film 8 which has anodized a metal film over its whole thickness is formed on an i-type semiconductor layer 5 for a thin-film transistor 3. For example, it is composed of aluminum oxide formed by anodization. The aluminum oxide film 8 is formed in a region on a gate interconnection GL so as to be a line shape along the gate interconnection GL; both ends are extended up to the outer edge part of a gate insulating film 4 formed nearly over the whole surface of a substrate 1. Since the material for the metal film is completely different from that of the gate insulating film 4, the gate insulating film 4 is not etched, and the blocking layer can be formed on a channel region in the i-type semiconductor layer.


Inventors:
KONYA NAOHIRO
Application Number:
JP18162491A
Publication Date:
January 14, 1993
Filing Date:
June 27, 1991
Export Citation:
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Assignee:
CASIO COMPUTER CO LTD
International Classes:
G02F1/136; G02F1/1368; H01L21/02; H01L29/786; (IPC1-7): G02F1/136; H01L21/02