PURPOSE: To prevent the mulfunction of this circuit used for a logic circuit by providing a spike removing circuit composed of m-stage delay flip flops, an AND gate, and a set/reset flip flop in the title circuit.

CONSTITUTION: When a reference clock is inputted to terminals T of delay flip flops 6 and 7 as data inputs, the Q outputs of the flip flops 6 and 7 respectively become waveforms B and C. Then the output of an AND gate 1 which inputs the waveforms B and C as two inputs becomes A and the waveform A is inputted to the terminal D of the flip flop 6 through a spike removing circuit. Thus, the data/3 output becomes a signal which is obtained by dividing the frequency of the data input signals by '3'. In addition, the CLK which is sufficiently faster than the frequency of the data is inputted to the spike removing circuit as a reference clock.