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Patent Searching and Data


Title:
FREQUENCY MULTIPLYING CIRCUIT
Document Type and Number:
Japanese Patent JPH03149919
Kind Code:
A
Abstract:

PURPOSE: To simplify the capacitance by using an internal reference signal to measure the period of an input signal, and outputting a signal having an equal period to that of a desired frequency signal based on a multiple set externally and on the measured period of the input signal.

CONSTITUTION: A periodic signal is inputted to an input terminal 1, a differentiating circuit 2 differentiates the input signal and a signal forming circuit 3 forms a signal starting the measurement of a period measuring counter 5. The period measuring counter 5 measures the period of an input signal based on the reference clock of an oscillator 4. Then the output of the period measuring counter 5 is read in a latch circuit 6 in a timing next to the time of the differentiating signal obtained from the input signal. A frequency division ratio setting circuit 7 decides the frequency division ratio of a variable frequency division circuit 9 based on a magnification of frequency set at an external setting terminal 8, applies variable frequency division and outputs the result to an output terminal 10. Thus, the multiple circuit is constituted of only a digital circuit, and the consideration of the variable in the circuit component or the like is not required.


Inventors:
AYUSAWA HITOMI
Application Number:
JP28838189A
Publication Date:
June 26, 1991
Filing Date:
November 06, 1989
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
H03K5/00; (IPC1-7): H03K5/00
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)