Title:
FUSING CIRCUIT FOR SEMICONDUCTOR IC
Document Type and Number:
Japanese Patent JP3814019
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To conduct adjustment to a design objective accurately after the manufacture of a semiconductor IC by fusing a variable link selected according to an input signal by utilizing a large number of fusing circuits.
SOLUTION: A comparison-voltage output section 120 is composed of an N-P-N transistor Q11, in which specified bias voltage Vbias1 is applied to a base and power-supply voltage VDD is applied to a collector, and resistors 11, 12 mounted between the emitter of the transistor Q11 and a ground power supply GND and used for providing first and second comparison signals COM1, COM2 to a comparision section 140 according to the fusing state of a variable link 110. That is, the comparison-voltage output section 120 is composed of a voltage-dividing circuit using the resistors 11, 12 in series connection, and the voltage level of the first comparison signal COM1 output from the power- supply voltage side of the resistor R11 is adjusted in conformity with the state of the variable link 110.
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Inventors:
Mutsumi Michimi
Masahiro Tokita
Masahiro Tokita
Application Number:
JP16913196A
Publication Date:
August 23, 2006
Filing Date:
June 28, 1996
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
H01L27/04; G05F1/46; G05F1/56; H01L21/82; H01L21/822; (IPC1-7): H01L27/04; H01L21/822; G05F1/56; H01L21/82
Domestic Patent References:
| JP7183387A | ||||
| JP6140512A | ||||
| JP50073549A |
Attorney, Agent or Firm:
Masatake Shiga
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