To provide a gain switching amplifier circuit suppressing increase in a required transistor size and reducing current consumption.
Transistors Q1-Q6 are connected to an input terminal with a base made common to configure a shunt circuit wherein an input signal is amplified and collector currents Ic1-Ic6 are outputted. A 1/power-of-2 switching type shunt circuit composed of a differential amplifier circuit comprising Q7, Q8, Q17, Q18 and four multi-output type differential amplifier circuits each comprising Q9-Q26 is connected to collectors of Q1-Q6 in parallel with an output terminal. Each 1/power-of-2 switching type branch circuit outputs 1/power-of-2 of the currents Ic1-Ic6 or "0" according to the gain switching signal of a binary code inputted via a gain switching terminal.
MIYAHARA YASUTOKU
HIRANO SHUNSUKE
Hironori Honda
Toshimitsu Ichikawa
Takeshi Takamatsu
Yuriko Hamada
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