HEAT TREATMENT OF GROUP III-V COMPOUND SEMICONDUCTOR MATERIAL

Japanese Patent JP3656261

B2

PURPOSE: To provide a method for heat treatment so designed that a group III-V compound semiconductor crystal is repeatedly heated and cooled at least twice within a specified temperature range not higher than the melting point of the material so that the rate of temperature fall is greater than the rate of temperature rise while holding the crystal as a whole at a uniform temperature to virtually remove the residual stress, leading to no development of slip due to temperature rise even if a wafer obtained from the resultant crystal is subjected to epitaxial growth.
CONSTITUTION: The above-mentioned specified temperature range means a range between the upper limit temperature at or below the melting point the material but ≥800°C and the lower limit temperature at or below the upper limit temperature but ≥800°C. A cylindrical compound semiconductor ingot with a diameter of D and a length of L is encapsulated in a quartz tube and put into an oven. From a time t0, the temperature of the oven is raised at a rate of E°C/h. At a time t1, the upper limit temperature Th is reached. Then, the temperature of the oven is lowered at a rate of B°C/h. At a time t2, the lower limit temperature T1 determined in advance is reached. Then, the temperature of the oven is raised again at a rate of A°C/h. At a time t3, the upper limit temperature Th is reached. In this way, temperature rise/fall for the specimen are repeated.

Shinichi Sawada

JP28428594A

June 08, 2005

October 24, 1994

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Sumitomo Electric Industries, Ltd.

C30B29/40; C30B29/42; C30B33/00; C30B33/02; H01L21/208; (IPC1-7): C30B33/02; C30B29/42; H01L21/208

JP5117097A
JP64014200A
JP4224196A

Shigeki Kawase

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