PURPOSE: To increase the output synthesis efficiency at a high frequency even when an FET is subject to the effect of a high frequency component and a divided frequency component by setting the ground condition of plural FETs connected in cascade identically over a wide frequency.

CONSTITUTION: A gate width of FETs Q1, Q2 and a gate width of a current source FETQ3 are set to 1mm respectively and a gate voltage VG3 of the FETQ3 is set to 0V. Thus, the FETs Q1, Q2 are operated by a current a half of the saturation current IDSS. Furthermore, the capacitance of high frequency short-circuit capacitors C1, C2 is set identical to set the ground condition of the FETs Q1, Q2 over a wide frequency range. Thus, even when the FETs Q1, Q2 are in operation with a high output and affected by higher harmonic and divided frequency components due to the nonlinear component, they are operated in the same operating condition and the combination efficiency of high frequency power is enhanced.