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Patent Searching and Data


Title:
PROGRAMMABLE ATTENUATION CIRCUIT
Document Type and Number:
Japanese Patent JPH04145714
Kind Code:
A
Abstract:

PURPOSE: To set a time change characteristic of an attenuation by selecting a frequency of a clock signal inputted to a down-counter.

CONSTITUTION: A switching address generating circuit 6 detects whether or not a count of a count signal 161 of a down-counter 4 reaches a prescribed count. Then a switching address signal 201 to switch sequentially clock signals 121-12M is outputted to a selector 3. A count control circuit 5 stops the operation of the counter 4 when a signal 161 of the counter 4 reaches all 0. The time when an output period of the signal 161 outputted from the counter 4 depends on the frequency of the signals 121-12M inputted to the counter 4. Thus, the attenuation time characteristic of the analog signal 171 is set by selecting the frequency of the signals 121-12M.


Inventors:
TAKEMURA TAKASHI
MATSUI YASURO
Application Number:
JP26995990A
Publication Date:
May 19, 1992
Filing Date:
October 08, 1990
Export Citation:
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Assignee:
NEC CORP
NIPPON ELECTRIC ENG
International Classes:
H03M1/66; G01S7/52; G01S7/526; H03G3/02; H03G3/10; H03G3/20; (IPC1-7): G01S7/52; H03G3/02; H03G3/10; H03G3/20; H03M1/66
Attorney, Agent or Firm:
Uchihara Shin