To provide an HPF or the like using an SC circuit, capable of reducing an area when raising the clock frequency of a switch configuring the SC circuit, and capable of lowering a cutoff frequency without losing design flexibility.
The high pass filter of M (M is an integer of ≥2) order using the switched capacitor circuit includes a first switched capacitor integrator 1001 having a first operational amplifier OP1 provided with a first input end, a second input end and an output end, a first input capacitor C1, and a gain adjustment circuit GA1 for adjusting the gain of the high pass filter for a feedback signal fed back from the output end. To the first input end, the input signal VIN of the high pass filter is supplied. To the second input end, the feedback signal is supplied through the first input capacitor C1. From the output end, the output signal VOUT of the high pass filter is output.
YOSHIDA NAOKI
TOKYO INST TECH
Osamu Suzawa
Kazuhiko Miyasaka
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