Title:
電子回路用のコピー防止を作成する方法
Document Type and Number:
Japanese Patent JP2005528783
Kind Code:
A
Abstract:
Processes for producing copy protection for an integrated circuit are provided. To avoid unauthorized copying of an integrated circuit, an effective and reliable copy protection are provided. The process includes the steps of providing a substrate that has semiconductor structures on at least a first side of the substrate, providing a material for coating the substrate, and coating the substrate with a copy-protect layer. In one embodiment, the copy-protect layer is produced by applying a silicate glass by evaporation coating. Thus, an etching process that dissolves the copy-protect layer also attacks the substrate so that the semiconductor structures are at least partially destroyed.
Inventors:
Munt, Dietrich
Leip, Jurgen
Leip, Jurgen
Application Number:
JP2003585179A
Publication Date:
September 22, 2005
Filing Date:
April 15, 2003
Export Citation:
Assignee:
SCHOTT AG
International Classes:
G02B3/00; B81C1/00; B81C3/00; C03B19/00; C03C4/12; C03C14/00; C03C15/00; C03C17/02; C03C17/34; C03C27/02; C23C14/10; H01L21/027; H01L21/306; H01L21/3065; H01L21/312; H01L21/316; H01L21/50; H01L21/56; H01L21/768; H01L23/00; H01L23/02; H01L23/10; H01L23/29; H01L23/31; H01L23/48; H01L51/50; H01L51/52; H05B33/04; H05B33/10; H05B33/24; H05B33/26; H05B33/28; H01L23/498; H05K3/28; (IPC1-7): H01L23/00
Attorney, Agent or Firm:
Masao Okabe
Nobuaki Kato
Kazuo
Okabe
Shinichi Usui
Ikuo Fujino
Takao Ochi
Teruhisa Motomiya
Norimichi Takanashi
Tsuneo Kobayashi
Masami Saito
Nobuaki Kato
Kazuo
Okabe
Shinichi Usui
Ikuo Fujino
Takao Ochi
Teruhisa Motomiya
Norimichi Takanashi
Tsuneo Kobayashi
Masami Saito