Title:
CELL ASSEMBLING AND MULTIPLEXING PROCESSOR
Document Type and Number:
Japanese Patent JPH07115419
Kind Code:
A
Abstract:
PURPOSE: To considerably reduce the amount of hardware.
CONSTITUTION: An SN counter 32 which repeatedly counts a frame pulse FP in the STM data string inputted from an STM multiple line 11 by a number of times corresponding to a prescribed cell length and updates and outputs an SN value indicating a cellular sequence at each time of counting it and an AL header generating circuit 34 which generates an AAL header based on the SN value of the SN counter 32 are provided. The AAL header is added independently of the timing of the read of data constituting a cell from a cell assembling buffer 23 or the channel of this cell, thereby reducing the amount of hardware of the SN counter.
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Inventors:
FUJITANI HIROSHI
MIZUNO TOSHIRO
OKUYA TAKENORI
MIZUNO TOSHIRO
OKUYA TAKENORI
Application Number:
JP26062293A
Publication Date:
May 02, 1995
Filing Date:
October 19, 1993
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H04M3/00; H04L12/28; H04L12/64; H04L47/43; (IPC1-7): H04L12/28; H04L12/64; H04M3/00
Attorney, Agent or Firm:
Yoshitaka Yoshitaka