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Title:
IMAGE FORMING DEVICE
Document Type and Number:
Japanese Patent JPS61272876
Kind Code:
A
Abstract:
PURPOSE:To process image information at a high speed and to attain real time processing by permitting the 1st CPU to rearrange the image information, detecting and correcting an error, and causing the 2nd CPU to write image data in an image memory. CONSTITUTION:The 1st CPU 12 accumulates six bits of each symbol supplied from an interface circuit 11 to de-interleave a subcode by a pack. Then an error is detected with the use of a parity. Where it is decided to have an error, the erroneous bit is corrected. The subcodes of one pack are transferred and stored in a RAM 15. The 2nd CPU 20 reads the image information of one pack out of the RAM 15, and decodes control data on the subcode. When the decoded instruction indicates plotting by a font, writing the image data in a V-RAM 28 and setting a border color, the image data indicating the border color is latched in a border latch circuit 29.

Inventors:
HIBINO CHITOSHI
ARIMOTO ATSUSHI
YOSHIHARA KENJI
Application Number:
JP11504485A
Publication Date:
December 03, 1986
Filing Date:
May 28, 1985
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
G06F3/153; G06T11/00; G09G1/02; G09G5/00; G09G5/06; (IPC1-7): G06F3/153; G06F15/64; G09G1/02
Attorney, Agent or Firm:
Tadahiko Ito



 
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