PURPOSE: To effectively reduce the quantity of a high speed picture memory required for reducing data and to improve practability as for loading a satellite by data-compressing output data of plural photodetectors by means of a data compression system whose constitution is simple, subtracting data by means of adjusting time for respective pairs and considerably reducing the quantity of output data.

CONSTITUTION: This processor is provided with data compression circuits 11-1 to 11-3 which data-compress data that plural photodetectors 3-1 to 3-3 image- picking up the same point of an image pickup objects arranged along a travel direction in different time output, first storage circuits 12-1 and 12-2 that temporarily store former compression data among pairs of photodetectors 3-1 to 3-3 which are adjacent in terms of time and which image-pickup the same point, that delay only time equal to the image pickup time of the pairs of light- receiving elements 3-1 to 3-3 and that output data, and first subtraction circuits 13-1 and 13-2 subtracting data which the first storage circuits 12-1 and 12-2 output from latter compression data. Thus, data can considerably be compressed by less memory quantity.