To provide an image processor equipped with a means which speeds up the whole process including transfer of an intermediate result between processors as a parallel type image processor.

It is made possible to transfer among N sets of processors 1, 1b, and 1c by connecting the processors 1a, 1b, and 1c by unidirectional ring-shaped buses 10a, 10b, and 10c, and the image processor is provided with an image input control part 20 which performs control so that time series successive images are inputted sequentially to local memories 2a and 2a', 2b and 2b', and 2c and 2c' connected to the processors 1a, 1b, and 1c in the order along the ring. Consequently, all processes of input of an image, preprocessing, transfer of the preprocessed image, detection of a moving body, and measurement are completed by one processor in a T×N time to enable the real-time processing of the time series of images, which are inputted in real time.