Title:
IMAGE PROCESSOR
Document Type and Number:
Japanese Patent JPS62264775
Kind Code:
A
Abstract:
PURPOSE:To realize 2-screen display functions with simple control constitution by driving a memory having plural ports and asynchronizing read/write to halve nearly the momory capacity. CONSTITUTION:Switch circuits 3, 4 are controlled by a switch control circuit 5 for video signal sources 1, 2 and a selected signal is subjected to frequency selection by a luminance signal extracting device 6 and a color defference signal extracting device 7. Since the color signal is subject to orthogonal phase modulation, the signal is demodulated into two color difference signals by a color difference signal demultiplexer 8. A switch circuit 9 selects the luminance signal and one of the two color difference signals, they are sent to an A/D converter 10 over a prescribed time zone and fetched in a memory 12. A write control section 13 and a read control section 14 to/from the momory are controlled entirely asynchronously except the moment when one line information in the memory is read out to the output port and a moving image is displayed in real time on one memory area.
Inventors:
OKAMOTO CHIKAYUKI
NISHIJIMA HIDEO
MASUDA MICHIO
OTSUBO HIROYASU
ONO KOICHI
NISHIJIMA HIDEO
MASUDA MICHIO
OTSUBO HIROYASU
ONO KOICHI
Application Number:
JP10660986A
Publication Date:
November 17, 1987
Filing Date:
May 12, 1986
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H04N5/265; H04N5/45; H04N9/74; (IPC1-7): H04N5/265; H04N5/45; H04N9/74
Attorney, Agent or Firm:
Katsuo Ogawa