To provide an image signal output apparatus which outputs an image signal of an interlace system with high image quality.
The image signal output apparatus comprises: a line adder 123 for converting progressive imaging signals of one frame read by an image sensor 110 into interlaced imaging signals of one field; a camera signal processor 124 for applying camera signal processing to the progressive imaging signals and the interlaced imaging signals to convert them into progressive image signals and interlaced image signals, respectively; a resolution converter 125 for enlarging the progressive image signals for the unit of a frame to convert them into interlaced image signals of two fields; and a memory controller 127 for converting the progressive image signals of one frame into interlaced image signals of two fields, and outputting them.
KUBO MANABU
JP2002314870A | 2002-10-25 | |||
JP2005021970A | 2005-01-27 | |||
JP2003046811A | 2003-02-14 | |||
JP2003153078A | 2003-05-23 | |||
JP2002314878A | 2002-10-25 | |||
JP2001086404A | 2001-03-30 | |||
JPH05260447A | 1993-10-08 | |||
JP2004312503A | 2004-11-04 |
Eiichi Tamura
Seiji Iga