To improve an addition speed by using AND gates by digits to be sent although conventional technology uses one AND gate for a carry signal sent from a certain start-point-(s) digit to several end-point-(t) digits.

The AND(1)H output (high voltages) carry signal C of a start- point-(s) digit is inputted to the base be(4) of a transistor tr(3) through a Cts line (2) and further connected to H (high voltage) through a resistance (5), and the laser diodes LD and Uc(6) or an end-point-(t) digit is connected to a collector of the tr. When it is (s)-digit AB=11, and AND (1) outputs H, when be(4) is H, the tr turns on to make the Uc illuminate. The 11 of intermediate (S+1) to (t-1) digits, 00 generated by OR(7) and an L signal (0 voltage), however, are inputted to the Cts line (2) through a downward diode di(8), so when there is even one 00 halfway, be(4) becomes L and the tr turns off, so that Uc goes out.