Title:
INFORMATION PROCESSING APPARATUS, AND IC CARD
Document Type and Number:
Japanese Patent JP3945497
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce the relationship between data of processing in an IC card chip and current consumption of the IC card chip.
SOLUTION: Processing orders of the IC card chip are changed at random or useless dummy processing is added to reduce the relationship between the processing data and the current consumption of the IC card chip. Thus, the association between the data of processing in the IC card chip and the current consumption of the IC card chip is reduced.
Inventors:
Yuuki Ohki
Neiko Fukuzawa
Susumu Okuhara
Masahiro Kaminaga
Neiko Fukuzawa
Susumu Okuhara
Masahiro Kaminaga
Application Number:
JP2004192539A
Publication Date:
July 18, 2007
Filing Date:
June 30, 2004
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
B42D15/10; H04L9/16; G06F12/14; G06F21/75; G06F21/86; G06K19/07; G06K19/10; G09C1/00; (IPC1-7): H04L9/16; B42D15/10; G06F12/14; G06K19/07; G06K19/10; G09C1/00
Domestic Patent References:
| JP2002517787A | ||||
| JP11296075A | ||||
| JP10154976A | ||||
| JP10091531A | ||||
| JP2002519722A |
Foreign References:
| WO1999035782A1 |
Other References:
岡本栄司、満保雅浩,新しい暗号攻撃法,bit,共立出版株式会社,1996年11月 1日,第28巻、第11号,p.62-66
Attorney, Agent or Firm:
Manabu Inoue
Previous Patent: FATIGUE FAILURE DIAGNOSING METHOD AND DEVICE OF TURBOCHARGER
Next Patent: MEMORY CELL AND SEMICONDUCTOR STORAGE DEVICE
Next Patent: MEMORY CELL AND SEMICONDUCTOR STORAGE DEVICE