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Patent Searching and Data


Title:
INFORMATION PROCESSOR
Document Type and Number:
Japanese Patent JPH05289786
Kind Code:
A
Abstract:

PURPOSE: To constitute the processor so that a central processing unit executes a regular operation, when the central processing unit executes a clock stop in a sleep state, and an interrupting signal is informed to the central processing unit.

CONSTITUTION: This information processor is constituted of an input means 4, a RAM 2 in which input data is stored, a ROM in which a program code is stored in advance, a central processing unit 5 for executing control in accordance with the code stored in the ROM 1, an oscillating circuit 6 for supplying a clock to its central processing unit 5, a clock control circuit 7 for controlling a clock from its oscillating circuit, an interruption control circuit 8 for controlling an interrupting signal, and a time counting means 9. In such a manner, switching from a regular mode to a sleep mode, and switching from the sleep mode to the regular mode are executed in several μs, therefore, low power consumption can be realized.


Inventors:
TAKAYAMA MASAYUKI
Application Number:
JP8704392A
Publication Date:
November 05, 1993
Filing Date:
April 08, 1992
Export Citation:
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Assignee:
KYOCERA CORP
International Classes:
G06F1/32; G06F1/04; (IPC1-7): G06F1/32; G06F1/04