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Title:
INSTRUCTION PERFORMANCE CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH0231229
Kind Code:
A
Abstract:

PURPOSE: To change instruction performance control function without changing the step of a microinstruction for execution of the microinstruction by controlling the valid/invalid states of the instruction performance control based on the data which is designated by the microprogram address of a microinstruction to be executed and read out of a memory.

CONSTITUTION: The microprogram address of a microprogram stored in a microinstruction register 2 is stored in an address register 3 via an address generating circuit 4. The microprogram address of the microinstruction to be executed next is decided by the circuit 4 based on the outputs of both registers 2 and 3. Then a memory 5 is addressed by the output of the register 3 and reads the designated data to a line 500. Then the execution of the microinstruction is kept waiting when the data on the line 500 and a wait timing signal 700 are set at 1.


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Inventors:
AZUMA YOSHIYASU
Application Number:
JP18022188A
Publication Date:
February 01, 1990
Filing Date:
July 21, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F9/22; (IPC1-7): G06F9/22
Attorney, Agent or Firm:
Masaki Yamakawa (2 outside)



 
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