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Title:
INTEGRATED STRUCTURE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP3166980
Kind Code:
B2
Abstract:

PURPOSE: To enable to manufacture a structure simply and economically by laminating the bipolar power transistor and the low-voltage bipolar transistor which has an emitter-switching circuit constitution or a semi-bridge circuit constitution.
CONSTITUTION: A second-conductive type first region 3, which constitutes the base of a bipolar power transistor Tp provided in first-conductive type semiconductor substrates 1 and 2, is provided. Furthermore, the emitter of the power transistor Tp provided in the first region 3 is constituted, and a first-conductive type embedded region 4 constituting the collector of a low-voltage bipolar transistor Ts is provided at the same time. In addition, a second-conductive type epitaxial layer 5, which is grown on the entire surface of the chip, is provided. A second-conductive type region 8, which is extended until the contact with the region 3 in this epitaxial layer 5 and formed, so as to surround the collector region 5 of the low voltage transistor Ts, is also provided. Thus, the power transistor Tp and the low-voltage transistor Ts can be laminated on the same semiconductor chip.


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Inventors:
Santo Puzzolo
Raphaere Zambrano
Mario paparo
Application Number:
JP30482391A
Publication Date:
May 14, 2001
Filing Date:
November 20, 1991
Export Citation:
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Assignee:
STMicroelectronics S.r.l.
Consolzio Perla Licerca Sula Microelet Ronica Nell Mezzo di Orno
International Classes:
H01L21/331; H01L21/8222; H01L27/06; H01L21/8249; H01L27/082; H01L29/73; H01L29/732; (IPC1-7): H01L21/8249; H01L27/06; H01L29/73
Domestic Patent References:
JP2253653A
JP6392058A
Attorney, Agent or Firm:
Akihide Sugimura (5 outside)