Title:
INTER-SYSTEM CHANNEL PAGING MECHANISM
Document Type and Number:
Japanese Patent JP2587190
Kind Code:
B2
Abstract:
PURPOSE: To provide an inter-system channel paging mechanism.
CONSTITUTION: An inter-system channel is implemented in the form of a page chain table. A central processor 110 and an I/O processor 108 respectively include means recognizing a specific instruction. As soon as recognizing the instruction, a processor constitutes a page chain table control block in the hardware system area 261 of a storage device. Once a page chain table is constituted, the processor transmits an information signal to the inter-system channel. In response to the reception of the information signal, the inter-system channel fetches at least one page chain table entry called a page chain table word. Then the inter-system channel starts the execution of the table (by each word).
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Inventors:
JEIMUZU DEIUITSUDO GURIINFUIIRUDO
MASUU JOOZEFU MITSUCHERU JUNIA
UIRIAMU ROBAATO TEIRAA
MASUU JOOZEFU MITSUCHERU JUNIA
UIRIAMU ROBAATO TEIRAA
Application Number:
JP18121693A
Publication Date:
March 05, 1997
Filing Date:
July 22, 1993
Export Citation:
Assignee:
INTAANASHONARU BIJINESU MASHIINZU CORP
International Classes:
G06F13/14; G06F13/12; G06F15/16; G06F15/17; (IPC1-7): G06F15/163; G06F13/14
Domestic Patent References:
| JP6113359A | ||||
| JP5810225A | ||||
| JP3252856A | ||||
| JP6410320A |
Attorney, Agent or Firm:
Kiyoshi Goda