PURPOSE: To insulate the bit lines of a junction-type field-effect memory from each other, by using a polycrystalline semiconductor layer to electrically disconnect buried diffused layers which act as the bit lines.
CONSTITUTION: Buried N+ impurity diffused layers 102, which act as bit lines, are provided in the surface portion of a P- silicon substrate 101. A silicon oxide film 103 is provided in the surface portion except in the positions of the diffused layers. N- semiconductor layers are then grown to provide single-crystal layers 104 and a polycrstalline layer 105. P+ gate regions 106 are then provided in contact with the single-crystal layers 104. Polycrystalline silicon wirings 108 are produced by diffusing an impurity through silicon oxide films. An aluminium wiring 110 is provided on silicon oxide films on the polycrystalline silicon wirings so that the aluminium wiring 110 is connected to the gares 106. As a result, the bit lines 102 are isolated from the substrate 101 by the inverse biasing of a pn junction and prevented by the polycrystalline semiconductor layer from being connected to each other through the grown semiconductor layers. The bit lines are thus insulated from each other.
JPS5811104 | [Title of the Invention] Hand Thailand memory cell |
JPS6356953 | COMPOSITE SEMICONDUCTOR DEVICE |
JPS58142580 | SEMICONDUCTOR DEVICE |
Next Patent: SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF