Title:
ラッチ回路
Document Type and Number:
Japanese Patent JP3935964
Kind Code:
B2
Abstract:
A low-voltage latch adapted for differential mode with a supply voltage of 2.5V and a voltage swing of 200 mV to 3000 mV is described. Two inverters, are used, each having a non-inverting and an inverting input terminal and a non-inverted and an inverted output terminal. The non-inverted output terminals are connected to the input of an OR structure, and the inverted output terminals are connected to the input of another OR structure. The input terminals of one inverter form the input terminals of the latch. The input terminals of the other inverter are connected to the output terminals of the OR structures and form the output of the latch. The supply voltages of the inverters are varied, so that at any given time, only one inverter has an appropriate supply voltage. This inverter then controls the output of the latch. In this way, a latch function is achieved.
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Inventors:
Jessen, Jeppe, Rene
Application Number:
JP53191498A
Publication Date:
June 27, 2007
Filing Date:
January 27, 1998
Export Citation:
Assignee:
Infineon Technologies AG
International Classes:
H03K3/037; H03K19/20; H03K3/012
Domestic Patent References:
| JP9326674A |
Attorney, Agent or Firm:
Hideto Asamura
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu