Title:
LAYOUT METHOD, LAYOUT PROGRAM AND STORAGE MEDIUM
Document Type and Number:
Japanese Patent JP3953740
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To automatically decide the shape and the layout of a block to minimize the length of interconnect in the floor plan of the hierarchy design of an LSI in a layout method, layout program and storage medium for locating the block in a layout region.
SOLUTION: The layout method, the layout program and the storage medium for locating blocks in the layout regions with the minimum length of interconnect comprises a step of placing the block in the layout region and repeating the following first step to third step, the steps includes a first step of extracting blocks arranged and overlapped to move a fixed amount in a direction for separating the overlapping sides, then returning an area equal to original to deform a shape, the second step of calculating the fixed amount for movement of the center of the block in a direction to reduce the overlapping when the blocks are still overlapped in a state that the region is returned to original, then calculating the fixed amount to move the center of the block in a direction internal from outside when the blocks are on the outside of the above layout region by the amount of a calculated movement, and a third step of calculating the amount of movement for moving the block to internal direction from outside to minimize the interconnect length in the layout region based on the amount of calculated movement.
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Inventors:
Toshihiko Yokomaru
Application Number:
JP2001051560A
Publication Date:
August 08, 2007
Filing Date:
February 27, 2001
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F17/50; H01L21/82; (IPC1-7): H01L21/82; G06F17/50
Domestic Patent References:
| JP6216355A | ||||
| JP3025953A |
Attorney, Agent or Firm:
Morihiro Okada