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Title:
LEAD FRAME, METHOD FOR PARTIALLY PLATING LEAD FRAME WITH NOBLE METAL AND SEMICONDUCTOR DEVICE FORMED BY USING THE LEAD FRAME
Document Type and Number:
Japanese Patent JP3701373
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a lead frame made of a copper alloy with which the occurrence of delimitation occurring in the lead frame is prevented and the impairment of the bondability is averted without depending on conduction for assembling ICs and, simultaneously, a process for manufacturing the lead frame and a semiconductor device formed by using the leas frame.
SOLUTION: This lead frame 110 for the semiconductor device of a resin sealing type is formed by using the copper alloy material as a base material, subjecting the base material to partial plating of the noble metals consisting of at least one among silver, gold and palladium for wire bonding or die bonding and subjecting the lead frame to copper strike plating as substrate plating for the partially noble metal silver plating. The whole or the prescribed parts of the surface of the copper alloy material on at least the side in contact with the sealing resin are subjected to thin noble plating 130 consisting of at least one among thin silver, gold, platinum and palladium. Copper plating 140 is formed on the thin noble metal plating 130 and, in addition the partial noble metal plating 150 is formed in the prescribed regions on the copper plating 140.


Inventors:
Hideo Hotta
Chiaki Hatsuda
Application Number:
JP5531696A
Publication Date:
September 28, 2005
Filing Date:
February 20, 1996
Export Citation:
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Assignee:
Dai Nippon Printing Co.,Ltd.
International Classes:
C23C18/42; C23C28/02; C25D5/02; C25D7/00; H01L23/50; (IPC1-7): H01L23/50; C23C18/42; C25D7/00
Domestic Patent References:
JP3097252A
JP63041057A
JP6334087A
Attorney, Agent or Firm:
Satoshi Kanayama