PURPOSE: To increase the speed of level conversion from an ECL(emitter coupled logic) circuit to a TTL(transistor transistor logic) circuit by using a transistor TR, where a certain potential is given to a base as a level switching part.

CONSTITUTION: The level switching part inserted between a positive power source VCC and one output node V1 consists of an NPN TR Q4. This TR Q4 is connected to a constant voltage source VB, and an output node V1 is a virtual fixed potential point. The potential of this output node V1 is used to easily generate a clamp voltage for saturation prevention which is supplied to a TR in the TTL output circuit. Since the level switching part consists of the TR Q4, two resistances R2 and R3 determine the level conversion speed, and the resistance value is reduced, and the time constant of charging/ discharging determined by the parasitic capacitance of output nodes V1 and V2 is shortened. Thus, the speed of level conversion from the ECL circuit to the TTL circuit is increased.