MAINTENANCE OPERATING METHOD FOR ATM-M BUS SYSTEM AND ID REASSINGING METHOD

Title:

MAINTENANCE OPERATING METHOD FOR ATM-M BUS SYSTEM AND ID REASSINGING METHOD

Document Type and Number:

Japanese Patent JP3580404

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To provide a maintenance operating method and an ID reassingning method with which as influence on the dowstream side is eliminated at the time of fault occurrence in an ATM-M bus system.
SOLUTION: This ATM-M bus system is composed of an M bus interface unit 12 accommodated in an ATM exchange 11, M bus 2 composed of outgoing and incoming buses while accommodating both terminals in this unit 12 and returning them at the most distant terminal and plural branching devices 3 serially connected to the M bus 2. At such a time, a loop back is formed at the branching device 3 of a higher order than the occurrence point of a fault when the fault occurs, and the branching device 3 of th higher order can be operated. Further, at the time of fault recovery, the low-order branching device 3 periodically sends an ID assignment request and the unit 12 successively sends the ID assignment confirmation request loading an ID number in order from the youngest ID number. Then this ID assignment confirmation request is received on the incoming bus, the ID assignment request of this ID is sent to the outgoing bus.

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Inventors:

Hiroshi Otsuka
Shinji Sugawara
Junji Asakura
Hitoshi Maeda

Application Number:

JP23199098A

Publication Date:

October 20, 2004

Filing Date:

August 18, 1998

Export Citation:

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Assignee:

Nakayo Communication Equipment Co., Ltd.
Nippon Telegraph and Telephone Corporation

International Classes:

H04L12/24; H04L12/28; H04L12/40; H04L12/403; (IPC1-7): H04L12/24; H04L12/403

Domestic Patent References:

JP10210045A
JP4100343A
JP4249444A

Foreign References:

WO1996036149A1

Attorney, Agent or Firm:

Patent Business Corporation Daiichi International Patent Office
Yoshiaki Numagata
Takio Sumiyoshi
Yasue Numagata

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