Title:
MANUFACTURE OF ELECTRONIC DEVICE
Document Type and Number:
Japanese Patent JP3404057
Kind Code:
B2
Abstract:
PURPOSE: To enable realization of selective metalization in an integrated circuit adequately by forming a metal silicide region on the substrate in a region, arranging at the bottom part of an opening, and performing copper plating on the silicide.
CONSTITUTION: An element metal 10 such as palladium is deposited on a silicon surface 11, through the opening in a dielectric layer 14. An interface is heated to a temperature of 200-300°C, and silicide 5 is thereby formed. Once the intended silicide has been formed, the element metal 10 is removed from a region, wherein the deposition of copper is not required. Then, the remaining silicide is inputted into a non-electrolytic plating drum, and a copper region 20 is grown on the silicide 5. The plating occurs only on the silicide or on the progressing of the copper deposition. Thus, selective metalization in an integrated circuit is realized.
Inventors:
Leonard Cecil Feldman
Greg Sumio Higashi
Cecilia Incimac
Barry mirror
Greg Sumio Higashi
Cecilia Incimac
Barry mirror
Application Number:
JP26045892A
Publication Date:
May 06, 2003
Filing Date:
September 30, 1992
Export Citation:
Assignee:
AT&T CORP.
International Classes:
H01L21/28; C23C18/31; H01L21/288; H01L21/768; H01L23/522; (IPC1-7): H01L21/288; H01L21/28; H01L21/768
Domestic Patent References:
| JP53139971A | ||||
| JP6312155A | ||||
| JP586967A | ||||
| JP1196143A | ||||
| JP6052044A | ||||
| JP6360546A | ||||
| JP634335B1 |
Attorney, Agent or Firm:
Masao Okabe (2 outside)
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