MANUFACTURE OF MIS TRANSISTOR - Nippon Steel Corporation

Title:

MANUFACTURE OF MIS TRANSISTOR

Document Type and Number:

Japanese Patent JP3273989

Kind Code:

B2

Abstract:

PURPOSE: To obtain stabilized characteristics independent of microscopically formed processing dimensions.
CONSTITUTION: After an insulator 55 has been buried in the groove 53 formed on a silicon substrate 51, a silicon thin film 59, which is extended to the point above the insulator 55 and also comes in contact with the source/drain diffusion layer 57 on a part of the aperture 58 formed on a silicon oxide film 56, is formed. The silicon thin film 59 is covered by a gate insulating film 60 and a gate electrode 61. As a result, the part in the vicinity of the surface of the silicon thin film 59 becomes the channel region of a thin film transistor, and also the film thickness of the silicon thin film 59 contributes to channel length.

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Inventors:

Kenji Anzai

Application Number:

JP5517393A

Publication Date:

April 15, 2002

Filing Date:

February 19, 1993

Export Citation:

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Assignee:

Nippon Steel Corporation

International Classes:

H01L29/78; H01L21/336; H01L29/786; (IPC1-7): H01L21/336; H01L29/786

Domestic Patent References:

JP62165364A

Attorney, Agent or Firm:

Koetsu Kokubun

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