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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2000286283
Kind Code:
A
Abstract:

To simplify a process and to form a connection electrode for CSP implementation at a low cost by removing unwanted rearranged wiring electrode metal layer, except for a rearrangement wiring electrode pattern with an insulating film and connection electrode as masks.

A polyimide is coated as an insulating film (both as patterning mask and reinforcing layer) 5, so that it is formed only on a pattern which is to become an rearranged wiring electrode 4-b. Here, a polyimide is not formed where a connection electrode 6 is formed, with an electrode surface left exposed. In this condition, a solder ball used as the connection electrode 6 is printed to a prescribed position by screen printing. With an insulating film formed lastly as well as a solder ball as masks, a Cu which is an exposed rearranged wiring electrode metal layer and a barrier metal TaN (rearranged wiring electrode metal layer unwanted part 7) are removed by successive wet-etching.


Inventors:
MATSUI KUNIYASU
Application Number:
JP8999999A
Publication Date:
October 13, 2000
Filing Date:
March 30, 1999
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
H01L23/12; H01L21/60; (IPC1-7): H01L21/60; H01L23/12
Attorney, Agent or Firm:
Kisaburo Suzuki (2 outside)