Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2638546
Kind Code:
B2
Abstract:
PURPOSE: To make it possible to reduce a required growth film thickness of embedded metal of a via hole to a minimum and detect the end point of grinding when performing a grinding operation only at one time for the flattening of an interlaminar insulation film and a via hole as well.
CONSTITUTION: A BPSG film 5B is formed on a first wiring 4B as an interlaminar insulation film to a thicker extent than 8 required film thickness, thereby forming a first open hole 6-1A and a second open hole 6-2A which reach the first wiring 4B and a silicon substrate 1. A W film 7-1A is selectively formed in each open hole and finally formed on the first open hole 6-1A which reaches the substrate 11 by a required film thickness. Then, the BPSG film 5B is ground and flattened until the W film 7-1A formed on the silicon substrate is exposed.
Inventors:
YAMADA YOSHIAKI
Application Number:
JP4018695A
Publication Date:
August 06, 1997
Filing Date:
February 28, 1995
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H01L21/28; H01L21/304; H01L21/3205; H01L21/768; (IPC1-7): H01L21/3205; H01L21/28; H01L21/304; H01L21/768
Domestic Patent References:
| JP6177256A | ||||
| JP6216095A | ||||
| JP6252112A | ||||
| JP661205A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)