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Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2713122
Kind Code:
B2
Abstract:

PURPOSE: To suppress the invasion of group-IV atoms into a group V site, reduce active positive holes and improve a side gate breakdown strength by a method wherein, after group V ions are implanted and ions for inactivation of electrons are implanted into an n-type III-V compound semiconductor doped with group-IV atoms, a heat treatment is performed, etc.
CONSTITUTION: Conductive compound semiconductor layers 3 and 4 composed of n-type III-V compound semiconductor layers doped with group IV atoms are formed on a semi-insulating substrate 1. Then impurity ions for inactivation of electrons are implanted into the substrate 1 which has the conductive compound semiconductor layers 3 and 4 and, further, impurities containing at least group V ions are implanted into the substrate 1. After that, a heat trearment is performed to isolate a doped region 6 electrically. For instance, an undoped GaAs layer 2, a high impurity concentration first n-type GaAs layer 3 and, further, a high impurity concentration second n-type GaAs layer 4 are successively built up. Then arsenic ions are selectively implanted into the isolated region 6 and, further, boron ions are implanted into the region 6.


Inventors:
Tsukada Anri
Application Number:
JP28991493A
Publication Date:
February 16, 1998
Filing Date:
October 26, 1993
Export Citation:
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Assignee:
NEC
International Classes:
H01L21/265; H01L21/338; H01L29/812; (IPC1-7): H01L21/338; H01L21/265; H01L29/812
Domestic Patent References:
JP243765A
JP218941A
JP1308081A
JP2305436A
JP4346458A
Attorney, Agent or Firm:
Soro Koro