Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6072242
Kind Code:
A
Abstract:
PURPOSE:To contrive to miniaturize elements by thinning N-epitaxial layers by a method wherein a metal silicide layer is provided on an N<+> buried layer into a double-layer construction, and the creep-up at the time of the depostion of an N-epitaxial layer is prevented. CONSTITUTION:An N<+> layer 2 is formed in a P type Si substrate 1 by As ion implantation with an SiO2 film 8 as a mask and then by heat-treatment. A resist mask 9 is applied, Co being evaporated, and the resist 9 and the Co layer 10b being then removed; thereafter a CoSi2 layer 10c is formed by heat treatment. At this time, the CoSi2 comes into the layer 2, and the upper surface of the layer 10c accordingly becomes nearly even with that of the substrate 1. Successive formation of an N-epitaxial layer 11 causes creep-up at the part of the layer 2 in contact with the layer 11; however, it does not generate on the layer 10c because of being positioned outside the region for the formation of the base and emitter. Therefore, the epitaxial layer 11 is formed to a thickness necessary only for element formation, and isolation layers 4, a collector layer 5, base layer 6, and an emitter layer 7 are provided. Since it is unnecessary to consider the amount of creep-up, the layer 11 can be thinned, and then a small-sized element can be formed.
Inventors:
SUZUKI KUNIHIRO
SUGII TOSHIHIRO
SUGII TOSHIHIRO
Application Number:
JP17970783A
Publication Date:
April 24, 1985
Filing Date:
September 28, 1983
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/331; H01L21/74; H01L21/8222; H01L27/06; H01L29/73; H01L29/732; (IPC1-7): H01L27/08; H01L29/72
Attorney, Agent or Firm:
Sadaichi Igita