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Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS63310170
Kind Code:
A
Abstract:

PURPOSE: To reduce a base width, by forming base and emitter regions by impurity diffusion and using temperature and time to control the diffusion.

CONSTITUTION: Boron ions are implanted into undoped polycrystalline silicon 4. When annealing is performed afterwards, boron is diffused from boron doped polycrystalline silicon 5 into an n-type silicon single-crystal layer 1, and one part of the n-type silicon layer 1 is converted into a p-type so that a p-type silicon region 6 is formed and a remaining n-type region becomes a collector region 9. When phosphorus ions are implanted into the boron-doped polycrystalline silicon 5 and next annealing is performed, one part of a p-type silicon region 6 is converted into an n-type silicon region 7. This n-type region 7 serves as an emitter region, and the remaining p-type region serves as a base region 8. At that time, temperature and time are used to control heat diffusion of boron and phosphorus from the polycrystalline silicon. Hence, a base width can be reduced.


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Inventors:
SUGII TOSHIHIRO
Application Number:
JP14728387A
Publication Date:
December 19, 1988
Filing Date:
June 12, 1987
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/73; H01L21/331; H01L27/12; H01L29/08; H01L29/72; (IPC1-7): H01L27/12; H01L29/08; H01L29/72
Domestic Patent References:
JPS61225866A1986-10-07
JPS49123274A1974-11-26
Attorney, Agent or Firm:
Sadaichi Igita